32-bit Computer Architecture

For my Computer Architecture course I designed and simulated a 32-bit processor in Logisim. The processor has its own ISA covering arithmetic (ADD, INC), logical (AND, OR, NOT), memory (STO, LOD), branching (BUN, BSA, ISZ), and control (HLT, I/O) instructions. The datapath wires an ALU, a register file, RAM, and a control unit with a hard-wired microprogram, all driven by an external clock and program counter.

Highlights

• Custom 32-bit ISA with arithmetic, logical, memory, branching, and control instructions
• Hard-wired control unit and microprogrammed control logic
• Full datapath: ALU + register file + RAM + program counter + bus
• Test programs that exercise every instruction class and run end-to-end in Logisim

Challenges

• Designing a control unit that decoded opcodes without exploding the combinational logic
• Debugging timing glitches across the bus when multiple components drove it simultaneously

What I learned

• Building a CPU from scratch changes how you read every other piece of code you write
• Microprogrammed control is verbose but worth it for instruction-set flexibility